In recent years, there has been an explosion in the use of mobile computing devices, such as smart phones, personal navigation devices, tablets (and other small form factor general computing devices), portable entertainment devices, personal games machine and the like.
There are a number of factors driving the uptake of mobile devices, and these include: the increased availability of mobile communication network bandwidth at reasonable cost (through the rollout of comprehensive mobile data networks, such as 3G/4G, wireless WAN technology—e.g. WiMAX—and the like); increased battery energy density/capacity (especially due to the introduction and improvements in Lithium Ion type batteries); and improved Integrated Circuits (IC) having increased computational capabilities whilst consuming relatively less power.
To improve the computational capability of Integrated Circuits (both mobile and, indeed, non-mobile) increased operating frequencies are used, whilst power consumption is not increased, so that the resultant Integrated Circuit not only has sufficient processing power to carry out the increasingly demanding operations of a user (e.g. streaming moving video over high speed mobile data networks), but also at a power consumption level that allows sufficient length of use of the mobile device whilst it is operating on battery power alone. These improvements to Integrated Circuits not only impact their use in mobile devices, but also improves devices meant for fixed power supplies (i.e. “mains” power), as reduced power requirements of the Integrated Circuits leads to more efficient “mains” operated hardware (through such things as reduced absolute power requirement of the IC, and a corresponding reduction in the IC cooling requirements). A lot of equipment used to create the infrastructure of communication networks or systems are “mains” powered devices. Examples of such infrastructure systems include mobile network base stations, internet switches and video conferencing equipment.
Any movement of data within a processor architecture, for example the data transfers of instructions and related operational data from memory in to the respective processing resources to executed those instructions, consumes power. Therefore, as the number of data transfers within a processor architecture increases, so too does the power consumption of the processor architecture. Reducing unnecessary memory transactions may reduce wasted power.